Semiconductor models

Old info, mostly correct except as below:

• logic

Device:

gatetype #(.model(process)) Uxxxxx (out, in1, in2, ...);

Paramset:

paramset mname logic;\
{args}\
endparamset

Device:

Uxxxxxxx out in1 in2 ... process gatetype

Model (required):

.model mname LOGIC {args}

Subcircuit definition (optional):

.subckt subname nodes
subcircuit description
.ends

Gatetype is the type of logic gate:

• and
• nand
• or
• nor
• xor
• xnor
• inv